8 template<
typename PARAM,
typename RET>
11 template<
typename PARAM,
typename RET>
14 template<
typename PARAM,
typename RET>
23 REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint16>(0x0F0F);
24 REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint16>(0x0F0F);
26 REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint16>(0x3333);
27 REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint16>(0x3333);
29 REG1 = ((REG1 << 1) | REG1) & static_cast<glm::uint16>(0x5555);
30 REG2 = ((REG2 << 1) | REG2) & static_cast<glm::uint16>(0x5555);
41 REG1 = ((REG1 << 8) | REG1) & static_cast<glm::uint32>(0x00FF00FF);
42 REG2 = ((REG2 << 8) | REG2) & static_cast<glm::uint32>(0x00FF00FF);
44 REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint32>(0x0F0F0F0F);
45 REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint32>(0x0F0F0F0F);
47 REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint32>(0x33333333);
48 REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint32>(0x33333333);
50 REG1 = ((REG1 << 1) | REG1) & static_cast<glm::uint32>(0x55555555);
51 REG2 = ((REG2 << 1) | REG2) & static_cast<glm::uint32>(0x55555555);
53 return REG1 | (REG2 << 1);
62 REG1 = ((REG1 << 16) | REG1) & static_cast<glm::uint64>(0x0000FFFF0000FFFFull);
63 REG2 = ((REG2 << 16) | REG2) & static_cast<glm::uint64>(0x0000FFFF0000FFFFull);
65 REG1 = ((REG1 << 8) | REG1) & static_cast<glm::uint64>(0x00FF00FF00FF00FFull);
66 REG2 = ((REG2 << 8) | REG2) & static_cast<glm::uint64>(0x00FF00FF00FF00FFull);
68 REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint64>(0x0F0F0F0F0F0F0F0Full);
69 REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint64>(0x0F0F0F0F0F0F0F0Full);
71 REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint64>(0x3333333333333333ull);
72 REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint64>(0x3333333333333333ull);
74 REG1 = ((REG1 << 1) | REG1) & static_cast<glm::uint64>(0x5555555555555555ull);
75 REG2 = ((REG2 << 1) | REG2) & static_cast<glm::uint64>(0x5555555555555555ull);
77 return REG1 | (REG2 << 1);
87 REG1 = ((REG1 << 16) | REG1) & static_cast<glm::uint32>(0xFF0000FFu);
88 REG2 = ((REG2 << 16) | REG2) & static_cast<glm::uint32>(0xFF0000FFu);
89 REG3 = ((REG3 << 16) | REG3) & static_cast<glm::uint32>(0xFF0000FFu);
91 REG1 = ((REG1 << 8) | REG1) & static_cast<glm::uint32>(0x0F00F00Fu);
92 REG2 = ((REG2 << 8) | REG2) & static_cast<glm::uint32>(0x0F00F00Fu);
93 REG3 = ((REG3 << 8) | REG3) & static_cast<glm::uint32>(0x0F00F00Fu);
95 REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint32>(0xC30C30C3u);
96 REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint32>(0xC30C30C3u);
97 REG3 = ((REG3 << 4) | REG3) & static_cast<glm::uint32>(0xC30C30C3u);
99 REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint32>(0x49249249u);
100 REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint32>(0x49249249u);
101 REG3 = ((REG3 << 2) | REG3) & static_cast<glm::uint32>(0x49249249u);
103 return REG1 | (REG2 << 1) | (REG3 << 2);
113 REG1 = ((REG1 << 32) | REG1) & static_cast<glm::uint64>(0xFFFF00000000FFFFull);
114 REG2 = ((REG2 << 32) | REG2) & static_cast<glm::uint64>(0xFFFF00000000FFFFull);
115 REG3 = ((REG3 << 32) | REG3) & static_cast<glm::uint64>(0xFFFF00000000FFFFull);
117 REG1 = ((REG1 << 16) | REG1) & static_cast<glm::uint64>(0x00FF0000FF0000FFull);
118 REG2 = ((REG2 << 16) | REG2) & static_cast<glm::uint64>(0x00FF0000FF0000FFull);
119 REG3 = ((REG3 << 16) | REG3) & static_cast<glm::uint64>(0x00FF0000FF0000FFull);
121 REG1 = ((REG1 << 8) | REG1) & static_cast<glm::uint64>(0xF00F00F00F00F00Full);
122 REG2 = ((REG2 << 8) | REG2) & static_cast<glm::uint64>(0xF00F00F00F00F00Full);
123 REG3 = ((REG3 << 8) | REG3) & static_cast<glm::uint64>(0xF00F00F00F00F00Full);
125 REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint64>(0x30C30C30C30C30C3ull);
126 REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint64>(0x30C30C30C30C30C3ull);
127 REG3 = ((REG3 << 4) | REG3) & static_cast<glm::uint64>(0x30C30C30C30C30C3ull);
129 REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint64>(0x9249249249249249ull);
130 REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint64>(0x9249249249249249ull);
131 REG3 = ((REG3 << 2) | REG3) & static_cast<glm::uint64>(0x9249249249249249ull);
133 return REG1 | (REG2 << 1) | (REG3 << 2);
143 REG1 = ((REG1 << 32) | REG1) & static_cast<glm::uint64>(0xFFFF00000000FFFFull);
144 REG2 = ((REG2 << 32) | REG2) & static_cast<glm::uint64>(0xFFFF00000000FFFFull);
145 REG3 = ((REG3 << 32) | REG3) & static_cast<glm::uint64>(0xFFFF00000000FFFFull);
147 REG1 = ((REG1 << 16) | REG1) & static_cast<glm::uint64>(0x00FF0000FF0000FFull);
148 REG2 = ((REG2 << 16) | REG2) & static_cast<glm::uint64>(0x00FF0000FF0000FFull);
149 REG3 = ((REG3 << 16) | REG3) & static_cast<glm::uint64>(0x00FF0000FF0000FFull);
151 REG1 = ((REG1 << 8) | REG1) & static_cast<glm::uint64>(0xF00F00F00F00F00Full);
152 REG2 = ((REG2 << 8) | REG2) & static_cast<glm::uint64>(0xF00F00F00F00F00Full);
153 REG3 = ((REG3 << 8) | REG3) & static_cast<glm::uint64>(0xF00F00F00F00F00Full);
155 REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint64>(0x30C30C30C30C30C3ull);
156 REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint64>(0x30C30C30C30C30C3ull);
157 REG3 = ((REG3 << 4) | REG3) & static_cast<glm::uint64>(0x30C30C30C30C30C3ull);
159 REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint64>(0x9249249249249249ull);
160 REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint64>(0x9249249249249249ull);
161 REG3 = ((REG3 << 2) | REG3) & static_cast<glm::uint64>(0x9249249249249249ull);
163 return REG1 | (REG2 << 1) | (REG3 << 2);
174 REG1 = ((REG1 << 12) | REG1) & static_cast<glm::uint32>(0x000F000Fu);
175 REG2 = ((REG2 << 12) | REG2) & static_cast<glm::uint32>(0x000F000Fu);
176 REG3 = ((REG3 << 12) | REG3) & static_cast<glm::uint32>(0x000F000Fu);
177 REG4 = ((REG4 << 12) | REG4) & static_cast<glm::uint32>(0x000F000Fu);
179 REG1 = ((REG1 << 6) | REG1) & static_cast<glm::uint32>(0x03030303u);
180 REG2 = ((REG2 << 6) | REG2) & static_cast<glm::uint32>(0x03030303u);
181 REG3 = ((REG3 << 6) | REG3) & static_cast<glm::uint32>(0x03030303u);
182 REG4 = ((REG4 << 6) | REG4) & static_cast<glm::uint32>(0x03030303u);
184 REG1 = ((REG1 << 3) | REG1) & static_cast<glm::uint32>(0x11111111u);
185 REG2 = ((REG2 << 3) | REG2) & static_cast<glm::uint32>(0x11111111u);
186 REG3 = ((REG3 << 3) | REG3) & static_cast<glm::uint32>(0x11111111u);
187 REG4 = ((REG4 << 3) | REG4) & static_cast<glm::uint32>(0x11111111u);
189 return REG1 | (REG2 << 1) | (REG3 << 2) | (REG4 << 3);
200 REG1 = ((REG1 << 24) | REG1) & static_cast<glm::uint64>(0x000000FF000000FFull);
201 REG2 = ((REG2 << 24) | REG2) & static_cast<glm::uint64>(0x000000FF000000FFull);
202 REG3 = ((REG3 << 24) | REG3) & static_cast<glm::uint64>(0x000000FF000000FFull);
203 REG4 = ((REG4 << 24) | REG4) & static_cast<glm::uint64>(0x000000FF000000FFull);
205 REG1 = ((REG1 << 12) | REG1) & static_cast<glm::uint64>(0x000F000F000F000Full);
206 REG2 = ((REG2 << 12) | REG2) & static_cast<glm::uint64>(0x000F000F000F000Full);
207 REG3 = ((REG3 << 12) | REG3) & static_cast<glm::uint64>(0x000F000F000F000Full);
208 REG4 = ((REG4 << 12) | REG4) & static_cast<glm::uint64>(0x000F000F000F000Full);
210 REG1 = ((REG1 << 6) | REG1) & static_cast<glm::uint64>(0x0303030303030303ull);
211 REG2 = ((REG2 << 6) | REG2) & static_cast<glm::uint64>(0x0303030303030303ull);
212 REG3 = ((REG3 << 6) | REG3) & static_cast<glm::uint64>(0x0303030303030303ull);
213 REG4 = ((REG4 << 6) | REG4) & static_cast<glm::uint64>(0x0303030303030303ull);
215 REG1 = ((REG1 << 3) | REG1) & static_cast<glm::uint64>(0x1111111111111111ull);
216 REG2 = ((REG2 << 3) | REG2) & static_cast<glm::uint64>(0x1111111111111111ull);
217 REG3 = ((REG3 << 3) | REG3) & static_cast<glm::uint64>(0x1111111111111111ull);
218 REG4 = ((REG4 << 3) | REG4) & static_cast<glm::uint64>(0x1111111111111111ull);
220 return REG1 | (REG2 << 1) | (REG3 << 2) | (REG4 << 3);
224 template<
typename genIUType>
225 GLM_FUNC_QUALIFIER genIUType mask(genIUType Bits)
227 GLM_STATIC_ASSERT(std::numeric_limits<genIUType>::is_integer,
"'mask' accepts only integer values");
229 return Bits >=
sizeof(genIUType) * 8 ? ~
static_cast<genIUType
>(0) : (
static_cast<genIUType
>(1) << Bits) -
static_cast<genIUType
>(1);
232 template<length_t L,
typename T, qualifier Q>
235 GLM_STATIC_ASSERT(std::numeric_limits<T>::is_integer,
"'mask' accepts only integer values");
240 template<
typename genIType>
243 GLM_STATIC_ASSERT(std::numeric_limits<genIType>::is_integer,
"'bitfieldRotateRight' accepts only integer values");
245 int const BitSize =
static_cast<genIType
>(
sizeof(genIType) * 8);
246 return (In <<
static_cast<genIType
>(Shift)) | (In >>
static_cast<genIType
>(BitSize - Shift));
249 template<length_t L,
typename T, qualifier Q>
252 GLM_STATIC_ASSERT(std::numeric_limits<T>::is_integer,
"'bitfieldRotateRight' accepts only integer values");
254 int const BitSize =
static_cast<int>(
sizeof(T) * 8);
255 return (In <<
static_cast<T
>(Shift)) | (In >>
static_cast<T
>(BitSize - Shift));
258 template<
typename genIType>
261 GLM_STATIC_ASSERT(std::numeric_limits<genIType>::is_integer,
"'bitfieldRotateLeft' accepts only integer values");
263 int const BitSize =
static_cast<genIType
>(
sizeof(genIType) * 8);
264 return (In >>
static_cast<genIType
>(Shift)) | (In << static_cast<genIType>(BitSize - Shift));
267 template<length_t L,
typename T, qualifier Q>
270 GLM_STATIC_ASSERT(std::numeric_limits<T>::is_integer,
"'bitfieldRotateLeft' accepts only integer values");
272 int const BitSize =
static_cast<int>(
sizeof(T) * 8);
273 return (In >>
static_cast<T
>(Shift)) | (In << static_cast<T>(BitSize - Shift));
276 template<
typename genIUType>
277 GLM_FUNC_QUALIFIER genIUType
bitfieldFillOne(genIUType Value,
int FirstBit,
int BitCount)
279 return Value |
static_cast<genIUType
>(mask(BitCount) << FirstBit);
282 template<length_t L,
typename T, qualifier Q>
285 return Value |
static_cast<T
>(mask(BitCount) << FirstBit);
288 template<
typename genIUType>
291 return Value &
static_cast<genIUType
>(~(mask(BitCount) << FirstBit));
294 template<length_t L,
typename T, qualifier Q>
297 return Value &
static_cast<T
>(~(mask(BitCount) << FirstBit));
323 return detail::bitfieldInterleave<uint8, uint16>(x, y);
328 return detail::bitfieldInterleave<uint8, uint16>(v.x, v.y);
336 REG1 = REG1 &
static_cast<uint16>(0x5555);
337 REG2 = REG2 &
static_cast<uint16>(0x5555);
339 REG1 = ((REG1 >> 1) | REG1) &
static_cast<uint16>(0x3333);
340 REG2 = ((REG2 >> 1) | REG2) &
static_cast<uint16>(0x3333);
342 REG1 = ((REG1 >> 2) | REG1) &
static_cast<uint16>(0x0F0F);
343 REG2 = ((REG2 >> 2) | REG2) &
static_cast<uint16>(0x0F0F);
345 REG1 = ((REG1 >> 4) | REG1) &
static_cast<uint16>(0x00FF);
346 REG2 = ((REG2 >> 4) | REG2) &
static_cast<uint16>(0x00FF);
348 REG1 = ((REG1 >> 8) | REG1) &
static_cast<uint16>(0xFFFF);
349 REG2 = ((REG2 >> 8) | REG2) &
static_cast<uint16>(0xFFFF);
377 return detail::bitfieldInterleave<uint16, uint32>(x, y);
382 return detail::bitfieldInterleave<uint16, uint32>(v.x, v.y);
390 REG1 = REG1 &
static_cast<glm::uint32>(0x55555555);
391 REG2 = REG2 &
static_cast<glm::uint32>(0x55555555);
393 REG1 = ((REG1 >> 1) | REG1) &
static_cast<glm::uint32>(0x33333333);
394 REG2 = ((REG2 >> 1) | REG2) &
static_cast<glm::uint32>(0x33333333);
396 REG1 = ((REG1 >> 2) | REG1) &
static_cast<glm::uint32>(0x0F0F0F0F);
397 REG2 = ((REG2 >> 2) | REG2) &
static_cast<glm::uint32>(0x0F0F0F0F);
399 REG1 = ((REG1 >> 4) | REG1) &
static_cast<glm::uint32>(0x00FF00FF);
400 REG2 = ((REG2 >> 4) | REG2) &
static_cast<glm::uint32>(0x00FF00FF);
402 REG1 = ((REG1 >> 8) | REG1) &
static_cast<glm::uint32>(0x0000FFFF);
403 REG2 = ((REG2 >> 8) | REG2) &
static_cast<glm::uint32>(0x0000FFFF);
431 return detail::bitfieldInterleave<uint32, uint64>(x, y);
436 return detail::bitfieldInterleave<uint32, uint64>(v.x, v.y);
444 REG1 = REG1 &
static_cast<glm::uint64>(0x5555555555555555ull);
445 REG2 = REG2 &
static_cast<glm::uint64>(0x5555555555555555ull);
447 REG1 = ((REG1 >> 1) | REG1) &
static_cast<glm::uint64>(0x3333333333333333ull);
448 REG2 = ((REG2 >> 1) | REG2) &
static_cast<glm::uint64>(0x3333333333333333ull);
450 REG1 = ((REG1 >> 2) | REG1) &
static_cast<glm::uint64>(0x0F0F0F0F0F0F0F0Full);
451 REG2 = ((REG2 >> 2) | REG2) &
static_cast<glm::uint64>(0x0F0F0F0F0F0F0F0Full);
453 REG1 = ((REG1 >> 4) | REG1) &
static_cast<glm::uint64>(0x00FF00FF00FF00FFull);
454 REG2 = ((REG2 >> 4) | REG2) &
static_cast<glm::uint64>(0x00FF00FF00FF00FFull);
456 REG1 = ((REG1 >> 8) | REG1) &
static_cast<glm::uint64>(0x0000FFFF0000FFFFull);
457 REG2 = ((REG2 >> 8) | REG2) &
static_cast<glm::uint64>(0x0000FFFF0000FFFFull);
459 REG1 = ((REG1 >> 16) | REG1) &
static_cast<glm::uint64>(0x00000000FFFFFFFFull);
460 REG2 = ((REG2 >> 16) | REG2) &
static_cast<glm::uint64>(0x00000000FFFFFFFFull);
471 } sign_x, sign_y, sign_z;
489 return detail::bitfieldInterleave<uint8, uint32>(x, y, z);
494 return detail::bitfieldInterleave<uint8, uint32>(v.x, v.y, v.z);
503 } sign_x, sign_y, sign_z;
521 return detail::bitfieldInterleave<uint32, uint64>(x, y, z);
526 return detail::bitfieldInterleave<uint32, uint64>(v.x, v.y, v.z);
535 } sign_x, sign_y, sign_z;
553 return detail::bitfieldInterleave<uint32, uint64>(x, y, z);
558 return detail::bitfieldInterleave<uint32, uint64>(v.x, v.y, v.z);
567 } sign_x, sign_y, sign_z, sign_w;
586 return detail::bitfieldInterleave<uint8, uint32>(x, y, z, w);
591 return detail::bitfieldInterleave<uint8, uint32>(v.x, v.y, v.z, v.w);
600 } sign_x, sign_y, sign_z, sign_w;
619 return detail::bitfieldInterleave<uint16, uint64>(x, y, z, w);
624 return detail::bitfieldInterleave<uint16, uint64>(v.x, v.y, v.z, v.w);
detail::int16 int16
16 bit signed integer type.
Definition scalar_int_sized.hpp:61
detail::int64 int64
64 bit signed integer type.
Definition scalar_int_sized.hpp:67
detail::int8 int8
8 bit signed integer type.
Definition scalar_int_sized.hpp:58
detail::int32 int32
32 bit signed integer type.
Definition scalar_int_sized.hpp:64
detail::uint32 uint32
32 bit unsigned integer type.
Definition scalar_uint_sized.hpp:64
detail::uint8 uint8
8 bit unsigned integer type.
Definition scalar_uint_sized.hpp:58
detail::uint16 uint16
16 bit unsigned integer type.
Definition scalar_uint_sized.hpp:61
detail::uint64 uint64
64 bit unsigned integer type.
Definition scalar_uint_sized.hpp:67
GLM_FUNC_DECL genIUType bitfieldRotateRight(genIUType In, int Shift)
GLM_FUNC_DECL genIUType bitfieldRotateLeft(genIUType In, int Shift)
GLM_FUNC_DECL genIUType bitfieldFillOne(genIUType Value, int FirstBit, int BitCount)
Definition bitfield.inl:277
GLM_FUNC_DECL int16 bitfieldInterleave(int8 x, int8 y)
Definition bitfield.inl:300
GLM_FUNC_DECL genIUType bitfieldFillZero(genIUType Value, int FirstBit, int BitCount)
Definition bitfield.inl:289
GLM_FUNC_DECL glm::u8vec2 bitfieldDeinterleave(glm::uint16 x)
Definition bitfield.inl:331
vec< 2, u8, defaultp > u8vec2
Definition fwd.hpp:340
vec< 4, u16, defaultp > u16vec4
Definition fwd.hpp:362
vec< 3, u32, defaultp > u32vec3
Definition fwd.hpp:381
vec< 2, u16, defaultp > u16vec2
Definition fwd.hpp:360
vec< 4, u8, defaultp > u8vec4
Definition fwd.hpp:342
vec< 3, u8, defaultp > u8vec3
Definition fwd.hpp:341
vec< 3, u16, defaultp > u16vec3
Definition fwd.hpp:361
vec< 2, u32, defaultp > u32vec2
Definition fwd.hpp:380
detail namespace with internal helper functions
Definition json.h:249
Core features
Definition common.hpp:21
Definition _vectorize.hpp:7
Definition qualifier.hpp:35