Clutter Engine 0.0.1
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bitfield.inl
1
2
3#include "../simd/integer.h"
4
5namespace glm{
6namespace detail
7{
8 template<typename PARAM, typename RET>
9 GLM_FUNC_DECL RET bitfieldInterleave(PARAM x, PARAM y);
10
11 template<typename PARAM, typename RET>
12 GLM_FUNC_DECL RET bitfieldInterleave(PARAM x, PARAM y, PARAM z);
13
14 template<typename PARAM, typename RET>
15 GLM_FUNC_DECL RET bitfieldInterleave(PARAM x, PARAM y, PARAM z, PARAM w);
16
17 template<>
19 {
20 glm::uint16 REG1(x);
21 glm::uint16 REG2(y);
22
23 REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint16>(0x0F0F);
24 REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint16>(0x0F0F);
25
26 REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint16>(0x3333);
27 REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint16>(0x3333);
28
29 REG1 = ((REG1 << 1) | REG1) & static_cast<glm::uint16>(0x5555);
30 REG2 = ((REG2 << 1) | REG2) & static_cast<glm::uint16>(0x5555);
31
32 return REG1 | static_cast<glm::uint16>(REG2 << 1);
33 }
34
35 template<>
37 {
38 glm::uint32 REG1(x);
39 glm::uint32 REG2(y);
40
41 REG1 = ((REG1 << 8) | REG1) & static_cast<glm::uint32>(0x00FF00FF);
42 REG2 = ((REG2 << 8) | REG2) & static_cast<glm::uint32>(0x00FF00FF);
43
44 REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint32>(0x0F0F0F0F);
45 REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint32>(0x0F0F0F0F);
46
47 REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint32>(0x33333333);
48 REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint32>(0x33333333);
49
50 REG1 = ((REG1 << 1) | REG1) & static_cast<glm::uint32>(0x55555555);
51 REG2 = ((REG2 << 1) | REG2) & static_cast<glm::uint32>(0x55555555);
52
53 return REG1 | (REG2 << 1);
54 }
55
56 template<>
58 {
59 glm::uint64 REG1(x);
60 glm::uint64 REG2(y);
61
62 REG1 = ((REG1 << 16) | REG1) & static_cast<glm::uint64>(0x0000FFFF0000FFFFull);
63 REG2 = ((REG2 << 16) | REG2) & static_cast<glm::uint64>(0x0000FFFF0000FFFFull);
64
65 REG1 = ((REG1 << 8) | REG1) & static_cast<glm::uint64>(0x00FF00FF00FF00FFull);
66 REG2 = ((REG2 << 8) | REG2) & static_cast<glm::uint64>(0x00FF00FF00FF00FFull);
67
68 REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint64>(0x0F0F0F0F0F0F0F0Full);
69 REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint64>(0x0F0F0F0F0F0F0F0Full);
70
71 REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint64>(0x3333333333333333ull);
72 REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint64>(0x3333333333333333ull);
73
74 REG1 = ((REG1 << 1) | REG1) & static_cast<glm::uint64>(0x5555555555555555ull);
75 REG2 = ((REG2 << 1) | REG2) & static_cast<glm::uint64>(0x5555555555555555ull);
76
77 return REG1 | (REG2 << 1);
78 }
79
80 template<>
82 {
83 glm::uint32 REG1(x);
84 glm::uint32 REG2(y);
85 glm::uint32 REG3(z);
86
87 REG1 = ((REG1 << 16) | REG1) & static_cast<glm::uint32>(0xFF0000FFu);
88 REG2 = ((REG2 << 16) | REG2) & static_cast<glm::uint32>(0xFF0000FFu);
89 REG3 = ((REG3 << 16) | REG3) & static_cast<glm::uint32>(0xFF0000FFu);
90
91 REG1 = ((REG1 << 8) | REG1) & static_cast<glm::uint32>(0x0F00F00Fu);
92 REG2 = ((REG2 << 8) | REG2) & static_cast<glm::uint32>(0x0F00F00Fu);
93 REG3 = ((REG3 << 8) | REG3) & static_cast<glm::uint32>(0x0F00F00Fu);
94
95 REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint32>(0xC30C30C3u);
96 REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint32>(0xC30C30C3u);
97 REG3 = ((REG3 << 4) | REG3) & static_cast<glm::uint32>(0xC30C30C3u);
98
99 REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint32>(0x49249249u);
100 REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint32>(0x49249249u);
101 REG3 = ((REG3 << 2) | REG3) & static_cast<glm::uint32>(0x49249249u);
102
103 return REG1 | (REG2 << 1) | (REG3 << 2);
104 }
105
106 template<>
108 {
109 glm::uint64 REG1(x);
110 glm::uint64 REG2(y);
111 glm::uint64 REG3(z);
112
113 REG1 = ((REG1 << 32) | REG1) & static_cast<glm::uint64>(0xFFFF00000000FFFFull);
114 REG2 = ((REG2 << 32) | REG2) & static_cast<glm::uint64>(0xFFFF00000000FFFFull);
115 REG3 = ((REG3 << 32) | REG3) & static_cast<glm::uint64>(0xFFFF00000000FFFFull);
116
117 REG1 = ((REG1 << 16) | REG1) & static_cast<glm::uint64>(0x00FF0000FF0000FFull);
118 REG2 = ((REG2 << 16) | REG2) & static_cast<glm::uint64>(0x00FF0000FF0000FFull);
119 REG3 = ((REG3 << 16) | REG3) & static_cast<glm::uint64>(0x00FF0000FF0000FFull);
120
121 REG1 = ((REG1 << 8) | REG1) & static_cast<glm::uint64>(0xF00F00F00F00F00Full);
122 REG2 = ((REG2 << 8) | REG2) & static_cast<glm::uint64>(0xF00F00F00F00F00Full);
123 REG3 = ((REG3 << 8) | REG3) & static_cast<glm::uint64>(0xF00F00F00F00F00Full);
124
125 REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint64>(0x30C30C30C30C30C3ull);
126 REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint64>(0x30C30C30C30C30C3ull);
127 REG3 = ((REG3 << 4) | REG3) & static_cast<glm::uint64>(0x30C30C30C30C30C3ull);
128
129 REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint64>(0x9249249249249249ull);
130 REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint64>(0x9249249249249249ull);
131 REG3 = ((REG3 << 2) | REG3) & static_cast<glm::uint64>(0x9249249249249249ull);
132
133 return REG1 | (REG2 << 1) | (REG3 << 2);
134 }
135
136 template<>
138 {
139 glm::uint64 REG1(x);
140 glm::uint64 REG2(y);
141 glm::uint64 REG3(z);
142
143 REG1 = ((REG1 << 32) | REG1) & static_cast<glm::uint64>(0xFFFF00000000FFFFull);
144 REG2 = ((REG2 << 32) | REG2) & static_cast<glm::uint64>(0xFFFF00000000FFFFull);
145 REG3 = ((REG3 << 32) | REG3) & static_cast<glm::uint64>(0xFFFF00000000FFFFull);
146
147 REG1 = ((REG1 << 16) | REG1) & static_cast<glm::uint64>(0x00FF0000FF0000FFull);
148 REG2 = ((REG2 << 16) | REG2) & static_cast<glm::uint64>(0x00FF0000FF0000FFull);
149 REG3 = ((REG3 << 16) | REG3) & static_cast<glm::uint64>(0x00FF0000FF0000FFull);
150
151 REG1 = ((REG1 << 8) | REG1) & static_cast<glm::uint64>(0xF00F00F00F00F00Full);
152 REG2 = ((REG2 << 8) | REG2) & static_cast<glm::uint64>(0xF00F00F00F00F00Full);
153 REG3 = ((REG3 << 8) | REG3) & static_cast<glm::uint64>(0xF00F00F00F00F00Full);
154
155 REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint64>(0x30C30C30C30C30C3ull);
156 REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint64>(0x30C30C30C30C30C3ull);
157 REG3 = ((REG3 << 4) | REG3) & static_cast<glm::uint64>(0x30C30C30C30C30C3ull);
158
159 REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint64>(0x9249249249249249ull);
160 REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint64>(0x9249249249249249ull);
161 REG3 = ((REG3 << 2) | REG3) & static_cast<glm::uint64>(0x9249249249249249ull);
162
163 return REG1 | (REG2 << 1) | (REG3 << 2);
164 }
165
166 template<>
168 {
169 glm::uint32 REG1(x);
170 glm::uint32 REG2(y);
171 glm::uint32 REG3(z);
172 glm::uint32 REG4(w);
173
174 REG1 = ((REG1 << 12) | REG1) & static_cast<glm::uint32>(0x000F000Fu);
175 REG2 = ((REG2 << 12) | REG2) & static_cast<glm::uint32>(0x000F000Fu);
176 REG3 = ((REG3 << 12) | REG3) & static_cast<glm::uint32>(0x000F000Fu);
177 REG4 = ((REG4 << 12) | REG4) & static_cast<glm::uint32>(0x000F000Fu);
178
179 REG1 = ((REG1 << 6) | REG1) & static_cast<glm::uint32>(0x03030303u);
180 REG2 = ((REG2 << 6) | REG2) & static_cast<glm::uint32>(0x03030303u);
181 REG3 = ((REG3 << 6) | REG3) & static_cast<glm::uint32>(0x03030303u);
182 REG4 = ((REG4 << 6) | REG4) & static_cast<glm::uint32>(0x03030303u);
183
184 REG1 = ((REG1 << 3) | REG1) & static_cast<glm::uint32>(0x11111111u);
185 REG2 = ((REG2 << 3) | REG2) & static_cast<glm::uint32>(0x11111111u);
186 REG3 = ((REG3 << 3) | REG3) & static_cast<glm::uint32>(0x11111111u);
187 REG4 = ((REG4 << 3) | REG4) & static_cast<glm::uint32>(0x11111111u);
188
189 return REG1 | (REG2 << 1) | (REG3 << 2) | (REG4 << 3);
190 }
191
192 template<>
194 {
195 glm::uint64 REG1(x);
196 glm::uint64 REG2(y);
197 glm::uint64 REG3(z);
198 glm::uint64 REG4(w);
199
200 REG1 = ((REG1 << 24) | REG1) & static_cast<glm::uint64>(0x000000FF000000FFull);
201 REG2 = ((REG2 << 24) | REG2) & static_cast<glm::uint64>(0x000000FF000000FFull);
202 REG3 = ((REG3 << 24) | REG3) & static_cast<glm::uint64>(0x000000FF000000FFull);
203 REG4 = ((REG4 << 24) | REG4) & static_cast<glm::uint64>(0x000000FF000000FFull);
204
205 REG1 = ((REG1 << 12) | REG1) & static_cast<glm::uint64>(0x000F000F000F000Full);
206 REG2 = ((REG2 << 12) | REG2) & static_cast<glm::uint64>(0x000F000F000F000Full);
207 REG3 = ((REG3 << 12) | REG3) & static_cast<glm::uint64>(0x000F000F000F000Full);
208 REG4 = ((REG4 << 12) | REG4) & static_cast<glm::uint64>(0x000F000F000F000Full);
209
210 REG1 = ((REG1 << 6) | REG1) & static_cast<glm::uint64>(0x0303030303030303ull);
211 REG2 = ((REG2 << 6) | REG2) & static_cast<glm::uint64>(0x0303030303030303ull);
212 REG3 = ((REG3 << 6) | REG3) & static_cast<glm::uint64>(0x0303030303030303ull);
213 REG4 = ((REG4 << 6) | REG4) & static_cast<glm::uint64>(0x0303030303030303ull);
214
215 REG1 = ((REG1 << 3) | REG1) & static_cast<glm::uint64>(0x1111111111111111ull);
216 REG2 = ((REG2 << 3) | REG2) & static_cast<glm::uint64>(0x1111111111111111ull);
217 REG3 = ((REG3 << 3) | REG3) & static_cast<glm::uint64>(0x1111111111111111ull);
218 REG4 = ((REG4 << 3) | REG4) & static_cast<glm::uint64>(0x1111111111111111ull);
219
220 return REG1 | (REG2 << 1) | (REG3 << 2) | (REG4 << 3);
221 }
222}//namespace detail
223
224 template<typename genIUType>
225 GLM_FUNC_QUALIFIER genIUType mask(genIUType Bits)
226 {
227 GLM_STATIC_ASSERT(std::numeric_limits<genIUType>::is_integer, "'mask' accepts only integer values");
228
229 return Bits >= sizeof(genIUType) * 8 ? ~static_cast<genIUType>(0) : (static_cast<genIUType>(1) << Bits) - static_cast<genIUType>(1);
230 }
231
232 template<length_t L, typename T, qualifier Q>
233 GLM_FUNC_QUALIFIER vec<L, T, Q> mask(vec<L, T, Q> const& v)
234 {
235 GLM_STATIC_ASSERT(std::numeric_limits<T>::is_integer, "'mask' accepts only integer values");
236
238 }
239
240 template<typename genIType>
241 GLM_FUNC_QUALIFIER genIType bitfieldRotateRight(genIType In, int Shift)
242 {
243 GLM_STATIC_ASSERT(std::numeric_limits<genIType>::is_integer, "'bitfieldRotateRight' accepts only integer values");
244
245 int const BitSize = static_cast<genIType>(sizeof(genIType) * 8);
246 return (In << static_cast<genIType>(Shift)) | (In >> static_cast<genIType>(BitSize - Shift));
247 }
248
249 template<length_t L, typename T, qualifier Q>
250 GLM_FUNC_QUALIFIER vec<L, T, Q> bitfieldRotateRight(vec<L, T, Q> const& In, int Shift)
251 {
252 GLM_STATIC_ASSERT(std::numeric_limits<T>::is_integer, "'bitfieldRotateRight' accepts only integer values");
253
254 int const BitSize = static_cast<int>(sizeof(T) * 8);
255 return (In << static_cast<T>(Shift)) | (In >> static_cast<T>(BitSize - Shift));
256 }
257
258 template<typename genIType>
259 GLM_FUNC_QUALIFIER genIType bitfieldRotateLeft(genIType In, int Shift)
260 {
261 GLM_STATIC_ASSERT(std::numeric_limits<genIType>::is_integer, "'bitfieldRotateLeft' accepts only integer values");
262
263 int const BitSize = static_cast<genIType>(sizeof(genIType) * 8);
264 return (In >> static_cast<genIType>(Shift)) | (In << static_cast<genIType>(BitSize - Shift));
265 }
266
267 template<length_t L, typename T, qualifier Q>
268 GLM_FUNC_QUALIFIER vec<L, T, Q> bitfieldRotateLeft(vec<L, T, Q> const& In, int Shift)
269 {
270 GLM_STATIC_ASSERT(std::numeric_limits<T>::is_integer, "'bitfieldRotateLeft' accepts only integer values");
271
272 int const BitSize = static_cast<int>(sizeof(T) * 8);
273 return (In >> static_cast<T>(Shift)) | (In << static_cast<T>(BitSize - Shift));
274 }
275
276 template<typename genIUType>
277 GLM_FUNC_QUALIFIER genIUType bitfieldFillOne(genIUType Value, int FirstBit, int BitCount)
278 {
279 return Value | static_cast<genIUType>(mask(BitCount) << FirstBit);
280 }
281
282 template<length_t L, typename T, qualifier Q>
283 GLM_FUNC_QUALIFIER vec<L, T, Q> bitfieldFillOne(vec<L, T, Q> const& Value, int FirstBit, int BitCount)
284 {
285 return Value | static_cast<T>(mask(BitCount) << FirstBit);
286 }
287
288 template<typename genIUType>
289 GLM_FUNC_QUALIFIER genIUType bitfieldFillZero(genIUType Value, int FirstBit, int BitCount)
290 {
291 return Value & static_cast<genIUType>(~(mask(BitCount) << FirstBit));
292 }
293
294 template<length_t L, typename T, qualifier Q>
295 GLM_FUNC_QUALIFIER vec<L, T, Q> bitfieldFillZero(vec<L, T, Q> const& Value, int FirstBit, int BitCount)
296 {
297 return Value & static_cast<T>(~(mask(BitCount) << FirstBit));
298 }
299
300 GLM_FUNC_QUALIFIER int16 bitfieldInterleave(int8 x, int8 y)
301 {
302 union sign8
303 {
304 int8 i;
305 uint8 u;
306 } sign_x, sign_y;
307
308 union sign16
309 {
310 int16 i;
311 uint16 u;
312 } result;
313
314 sign_x.i = x;
315 sign_y.i = y;
316 result.u = bitfieldInterleave(sign_x.u, sign_y.u);
317
318 return result.i;
319 }
320
321 GLM_FUNC_QUALIFIER uint16 bitfieldInterleave(uint8 x, uint8 y)
322 {
323 return detail::bitfieldInterleave<uint8, uint16>(x, y);
324 }
325
326 GLM_FUNC_QUALIFIER uint16 bitfieldInterleave(u8vec2 const& v)
327 {
328 return detail::bitfieldInterleave<uint8, uint16>(v.x, v.y);
329 }
330
332 {
333 uint16 REG1(x);
334 uint16 REG2(x >>= 1);
335
336 REG1 = REG1 & static_cast<uint16>(0x5555);
337 REG2 = REG2 & static_cast<uint16>(0x5555);
338
339 REG1 = ((REG1 >> 1) | REG1) & static_cast<uint16>(0x3333);
340 REG2 = ((REG2 >> 1) | REG2) & static_cast<uint16>(0x3333);
341
342 REG1 = ((REG1 >> 2) | REG1) & static_cast<uint16>(0x0F0F);
343 REG2 = ((REG2 >> 2) | REG2) & static_cast<uint16>(0x0F0F);
344
345 REG1 = ((REG1 >> 4) | REG1) & static_cast<uint16>(0x00FF);
346 REG2 = ((REG2 >> 4) | REG2) & static_cast<uint16>(0x00FF);
347
348 REG1 = ((REG1 >> 8) | REG1) & static_cast<uint16>(0xFFFF);
349 REG2 = ((REG2 >> 8) | REG2) & static_cast<uint16>(0xFFFF);
350
351 return glm::u8vec2(REG1, REG2);
352 }
353
354 GLM_FUNC_QUALIFIER int32 bitfieldInterleave(int16 x, int16 y)
355 {
356 union sign16
357 {
358 int16 i;
359 uint16 u;
360 } sign_x, sign_y;
361
362 union sign32
363 {
364 int32 i;
365 uint32 u;
366 } result;
367
368 sign_x.i = x;
369 sign_y.i = y;
370 result.u = bitfieldInterleave(sign_x.u, sign_y.u);
371
372 return result.i;
373 }
374
375 GLM_FUNC_QUALIFIER uint32 bitfieldInterleave(uint16 x, uint16 y)
376 {
377 return detail::bitfieldInterleave<uint16, uint32>(x, y);
378 }
379
380 GLM_FUNC_QUALIFIER glm::uint32 bitfieldInterleave(u16vec2 const& v)
381 {
382 return detail::bitfieldInterleave<uint16, uint32>(v.x, v.y);
383 }
384
386 {
387 glm::uint32 REG1(x);
388 glm::uint32 REG2(x >>= 1);
389
390 REG1 = REG1 & static_cast<glm::uint32>(0x55555555);
391 REG2 = REG2 & static_cast<glm::uint32>(0x55555555);
392
393 REG1 = ((REG1 >> 1) | REG1) & static_cast<glm::uint32>(0x33333333);
394 REG2 = ((REG2 >> 1) | REG2) & static_cast<glm::uint32>(0x33333333);
395
396 REG1 = ((REG1 >> 2) | REG1) & static_cast<glm::uint32>(0x0F0F0F0F);
397 REG2 = ((REG2 >> 2) | REG2) & static_cast<glm::uint32>(0x0F0F0F0F);
398
399 REG1 = ((REG1 >> 4) | REG1) & static_cast<glm::uint32>(0x00FF00FF);
400 REG2 = ((REG2 >> 4) | REG2) & static_cast<glm::uint32>(0x00FF00FF);
401
402 REG1 = ((REG1 >> 8) | REG1) & static_cast<glm::uint32>(0x0000FFFF);
403 REG2 = ((REG2 >> 8) | REG2) & static_cast<glm::uint32>(0x0000FFFF);
404
405 return glm::u16vec2(REG1, REG2);
406 }
407
408 GLM_FUNC_QUALIFIER int64 bitfieldInterleave(int32 x, int32 y)
409 {
410 union sign32
411 {
412 int32 i;
413 uint32 u;
414 } sign_x, sign_y;
415
416 union sign64
417 {
418 int64 i;
419 uint64 u;
420 } result;
421
422 sign_x.i = x;
423 sign_y.i = y;
424 result.u = bitfieldInterleave(sign_x.u, sign_y.u);
425
426 return result.i;
427 }
428
429 GLM_FUNC_QUALIFIER uint64 bitfieldInterleave(uint32 x, uint32 y)
430 {
431 return detail::bitfieldInterleave<uint32, uint64>(x, y);
432 }
433
434 GLM_FUNC_QUALIFIER glm::uint64 bitfieldInterleave(u32vec2 const& v)
435 {
436 return detail::bitfieldInterleave<uint32, uint64>(v.x, v.y);
437 }
438
440 {
441 glm::uint64 REG1(x);
442 glm::uint64 REG2(x >>= 1);
443
444 REG1 = REG1 & static_cast<glm::uint64>(0x5555555555555555ull);
445 REG2 = REG2 & static_cast<glm::uint64>(0x5555555555555555ull);
446
447 REG1 = ((REG1 >> 1) | REG1) & static_cast<glm::uint64>(0x3333333333333333ull);
448 REG2 = ((REG2 >> 1) | REG2) & static_cast<glm::uint64>(0x3333333333333333ull);
449
450 REG1 = ((REG1 >> 2) | REG1) & static_cast<glm::uint64>(0x0F0F0F0F0F0F0F0Full);
451 REG2 = ((REG2 >> 2) | REG2) & static_cast<glm::uint64>(0x0F0F0F0F0F0F0F0Full);
452
453 REG1 = ((REG1 >> 4) | REG1) & static_cast<glm::uint64>(0x00FF00FF00FF00FFull);
454 REG2 = ((REG2 >> 4) | REG2) & static_cast<glm::uint64>(0x00FF00FF00FF00FFull);
455
456 REG1 = ((REG1 >> 8) | REG1) & static_cast<glm::uint64>(0x0000FFFF0000FFFFull);
457 REG2 = ((REG2 >> 8) | REG2) & static_cast<glm::uint64>(0x0000FFFF0000FFFFull);
458
459 REG1 = ((REG1 >> 16) | REG1) & static_cast<glm::uint64>(0x00000000FFFFFFFFull);
460 REG2 = ((REG2 >> 16) | REG2) & static_cast<glm::uint64>(0x00000000FFFFFFFFull);
461
462 return glm::u32vec2(REG1, REG2);
463 }
464
465 GLM_FUNC_QUALIFIER int32 bitfieldInterleave(int8 x, int8 y, int8 z)
466 {
467 union sign8
468 {
469 int8 i;
470 uint8 u;
471 } sign_x, sign_y, sign_z;
472
473 union sign32
474 {
475 int32 i;
476 uint32 u;
477 } result;
478
479 sign_x.i = x;
480 sign_y.i = y;
481 sign_z.i = z;
482 result.u = bitfieldInterleave(sign_x.u, sign_y.u, sign_z.u);
483
484 return result.i;
485 }
486
487 GLM_FUNC_QUALIFIER uint32 bitfieldInterleave(uint8 x, uint8 y, uint8 z)
488 {
489 return detail::bitfieldInterleave<uint8, uint32>(x, y, z);
490 }
491
492 GLM_FUNC_QUALIFIER uint32 bitfieldInterleave(u8vec3 const& v)
493 {
494 return detail::bitfieldInterleave<uint8, uint32>(v.x, v.y, v.z);
495 }
496
497 GLM_FUNC_QUALIFIER int64 bitfieldInterleave(int16 x, int16 y, int16 z)
498 {
499 union sign16
500 {
501 int16 i;
502 uint16 u;
503 } sign_x, sign_y, sign_z;
504
505 union sign64
506 {
507 int64 i;
508 uint64 u;
509 } result;
510
511 sign_x.i = x;
512 sign_y.i = y;
513 sign_z.i = z;
514 result.u = bitfieldInterleave(sign_x.u, sign_y.u, sign_z.u);
515
516 return result.i;
517 }
518
519 GLM_FUNC_QUALIFIER uint64 bitfieldInterleave(uint16 x, uint16 y, uint16 z)
520 {
521 return detail::bitfieldInterleave<uint32, uint64>(x, y, z);
522 }
523
524 GLM_FUNC_QUALIFIER uint64 bitfieldInterleave(u16vec3 const& v)
525 {
526 return detail::bitfieldInterleave<uint32, uint64>(v.x, v.y, v.z);
527 }
528
529 GLM_FUNC_QUALIFIER int64 bitfieldInterleave(int32 x, int32 y, int32 z)
530 {
531 union sign16
532 {
533 int32 i;
534 uint32 u;
535 } sign_x, sign_y, sign_z;
536
537 union sign64
538 {
539 int64 i;
540 uint64 u;
541 } result;
542
543 sign_x.i = x;
544 sign_y.i = y;
545 sign_z.i = z;
546 result.u = bitfieldInterleave(sign_x.u, sign_y.u, sign_z.u);
547
548 return result.i;
549 }
550
551 GLM_FUNC_QUALIFIER uint64 bitfieldInterleave(uint32 x, uint32 y, uint32 z)
552 {
553 return detail::bitfieldInterleave<uint32, uint64>(x, y, z);
554 }
555
556 GLM_FUNC_QUALIFIER uint64 bitfieldInterleave(u32vec3 const& v)
557 {
558 return detail::bitfieldInterleave<uint32, uint64>(v.x, v.y, v.z);
559 }
560
561 GLM_FUNC_QUALIFIER int32 bitfieldInterleave(int8 x, int8 y, int8 z, int8 w)
562 {
563 union sign8
564 {
565 int8 i;
566 uint8 u;
567 } sign_x, sign_y, sign_z, sign_w;
568
569 union sign32
570 {
571 int32 i;
572 uint32 u;
573 } result;
574
575 sign_x.i = x;
576 sign_y.i = y;
577 sign_z.i = z;
578 sign_w.i = w;
579 result.u = bitfieldInterleave(sign_x.u, sign_y.u, sign_z.u, sign_w.u);
580
581 return result.i;
582 }
583
584 GLM_FUNC_QUALIFIER uint32 bitfieldInterleave(uint8 x, uint8 y, uint8 z, uint8 w)
585 {
586 return detail::bitfieldInterleave<uint8, uint32>(x, y, z, w);
587 }
588
589 GLM_FUNC_QUALIFIER uint32 bitfieldInterleave(u8vec4 const& v)
590 {
591 return detail::bitfieldInterleave<uint8, uint32>(v.x, v.y, v.z, v.w);
592 }
593
594 GLM_FUNC_QUALIFIER int64 bitfieldInterleave(int16 x, int16 y, int16 z, int16 w)
595 {
596 union sign16
597 {
598 int16 i;
599 uint16 u;
600 } sign_x, sign_y, sign_z, sign_w;
601
602 union sign64
603 {
604 int64 i;
605 uint64 u;
606 } result;
607
608 sign_x.i = x;
609 sign_y.i = y;
610 sign_z.i = z;
611 sign_w.i = w;
612 result.u = bitfieldInterleave(sign_x.u, sign_y.u, sign_z.u, sign_w.u);
613
614 return result.i;
615 }
616
617 GLM_FUNC_QUALIFIER uint64 bitfieldInterleave(uint16 x, uint16 y, uint16 z, uint16 w)
618 {
619 return detail::bitfieldInterleave<uint16, uint64>(x, y, z, w);
620 }
621
622 GLM_FUNC_QUALIFIER uint64 bitfieldInterleave(u16vec4 const& v)
623 {
624 return detail::bitfieldInterleave<uint16, uint64>(v.x, v.y, v.z, v.w);
625 }
626}//namespace glm
detail::int16 int16
16 bit signed integer type.
Definition scalar_int_sized.hpp:61
detail::int64 int64
64 bit signed integer type.
Definition scalar_int_sized.hpp:67
detail::int8 int8
8 bit signed integer type.
Definition scalar_int_sized.hpp:58
detail::int32 int32
32 bit signed integer type.
Definition scalar_int_sized.hpp:64
detail::uint32 uint32
32 bit unsigned integer type.
Definition scalar_uint_sized.hpp:64
detail::uint8 uint8
8 bit unsigned integer type.
Definition scalar_uint_sized.hpp:58
detail::uint16 uint16
16 bit unsigned integer type.
Definition scalar_uint_sized.hpp:61
detail::uint64 uint64
64 bit unsigned integer type.
Definition scalar_uint_sized.hpp:67
GLM_FUNC_DECL genIUType bitfieldRotateRight(genIUType In, int Shift)
GLM_FUNC_DECL genIUType bitfieldRotateLeft(genIUType In, int Shift)
GLM_FUNC_DECL genIUType bitfieldFillOne(genIUType Value, int FirstBit, int BitCount)
Definition bitfield.inl:277
GLM_FUNC_DECL int16 bitfieldInterleave(int8 x, int8 y)
Definition bitfield.inl:300
GLM_FUNC_DECL genIUType bitfieldFillZero(genIUType Value, int FirstBit, int BitCount)
Definition bitfield.inl:289
GLM_FUNC_DECL glm::u8vec2 bitfieldDeinterleave(glm::uint16 x)
Definition bitfield.inl:331
vec< 2, u8, defaultp > u8vec2
Definition fwd.hpp:340
vec< 4, u16, defaultp > u16vec4
Definition fwd.hpp:362
vec< 3, u32, defaultp > u32vec3
Definition fwd.hpp:381
vec< 2, u16, defaultp > u16vec2
Definition fwd.hpp:360
vec< 4, u8, defaultp > u8vec4
Definition fwd.hpp:342
vec< 3, u8, defaultp > u8vec3
Definition fwd.hpp:341
vec< 3, u16, defaultp > u16vec3
Definition fwd.hpp:361
vec< 2, u32, defaultp > u32vec2
Definition fwd.hpp:380
detail namespace with internal helper functions
Definition json.h:249
Core features
Definition common.hpp:21
Definition _vectorize.hpp:7
Definition qualifier.hpp:35